As those of skill in the art are aware, many different techniques can be used to provide cooling of electrical components. For example, circulation of air within a housing can be sufficient to cool some types of electrical components contained within the housing. Some electrical assemblies further include physical features (e.g., cooling fins, cooling manifolds) that increase the surface area exposed to convective air currents, or provide fans to circulate the air further, providing further cooling. This air cooling can be insufficient, however, for high power circuits and/or densely packed circuits.
High power and/or densely packed circuits can need additional heat dissipation, such as by mounting some or all of the electrical components to a thermal dissipation member such as a heat spreader, cold plate, cooling manifold, dissipater, evaporator, or other type of heat sink. The thermal dissipation member can, for example, be made using one or more materials having high thermal conductivity (e.g., metals such as copper and aluminum). The thermal dissipation member is able to conduct heat away from the electrical device and into the environment via contact between the thermal dissipation member and a structure designed to transfer the heat to the surrounding air or a liquid via conduction and convection. In some instances, a series of thermal dissipation members can work together to provide cooling.
Providing sufficient cooling for devices such as phased array antennas can present challenges. As is known in the art, a phased array antenna includes a plurality of antenna elements spaced apart from each other by known distances. Each of the antenna elements are typically coupled through a plurality of phase shifter circuits, amplifier circuits and/or other circuits to either or both of a transmitter or receiver. In some cases, the phase shifter, amplifier circuits and other circuits (e.g. mixer circuits) are provided in a so-called transmit/receive (T/R) module and are considered to be part of the transmitter and/or receiver.
The phase shifters, amplifier and other radio frequency (RF) circuits (e.g. T/R modules) are often powered by an external power supply (e.g. a DC power supply). Such circuits are referred to as “active circuits” or “active components.” Accordingly, phased array antennas which include active circuits are often referred to as “active phased arrays.” Active circuits dissipate power in the form of heat. Thus, it is necessary to cool active phased arrays so that the active circuits operate within a desired temperature range.
In active phased arrays having T/R channels which use relatively little power (e.g. less than about two Watts (W) average RF power), individual finned heat-sinks (or “heat-sinks”) are sometimes attached to each active circuit in the channels. That is, each active circuit has an individual heat sink attached thereto. Although this approach may satisfy the cooling requirements for the active phased array, this approach to thermal management is limited to relatively low power density active phased array's because the temperature rise is the cooling air stream can result in excessive variations in temperature across the array which will negatively impact performance.
In relatively high power per T/R channel applications, especially applications involving a high density of computer processors (e.g., a central processor unit (CPU) chip every inch, in a ten foot diameter assembly) it is often necessary to use a liquid cooling approach to maintain such active circuits in their normal operating temperature range. The liquid cooling approach is accomplished by clamping the electronics to these liquid cooled coldplates. The mechanical/thermal interfaces between the heat generating devices (e.g. the active circuits) and heat sinking devices determines, at least in part, the cooling effectiveness of heat sinking devices.
Some RF systems, including active phased arrays, utilize so-called flip-chip mounted circuits. Removing heat from flip-chips, especially those in configurations such as panel arrays, can be difficult. Various techniques have been used to provide cooling, and advantageously the methods used provide a cooling solution that helps to compensate for the tolerance stack-up between the thickness of each chip (and type of chip) and the heat sink providing the cooling, and also compensate for the coefficient of thermal expansion (CTE) mismatch between the Circuit Card Assembly (containing the flip-chips) and the coldplate. A commonly used technique to remove heat from flip-chips is to dispose an elastomeric material, such as a compliant epoxy or a thermal gap-pad (also referred to as a thermal mat) between the exposed surface of the flip-chip and a surface of a heat sink. A thermal gap pad resembles a soft piece of rubber with thermally conductive material in it, e.g., a silicone, or an elastomeric material.
An illustrative example of a configuration using a thermal gap pad is shown in FIG. 1. FIG. 1 shows an example of a prior art assembly 10 that includes a daughter card 12 (e.g., a substrate), to which a plurality of flip chips 14A-14D are attached via a plurality of solder balls 16. A thermal interface material (TIM) 18, which in this example is a thermal gap pad 18 and a cooling manifold 20 are compressed against the chips 14A-14D. Typically, the thermal gap pad 18 is made from a polymeric material, which generally is not as highly thermally conductive as other types of materials. The illustrative dimension of the thermal gap pad 18 of FIG. 1 (i.e., 40 mils) shows hot such a thermal gap pad 18 is relatively thick as compared to the devices it surrounds. When the cooling manifold and thermal gap pad 18 are compressed against the chips 14, the thermal gap pad 18 forms around the chips 14 to create a thermally conductive path.
The thermally conductive path in the assembly 10 of FIG. 1 generally runs from the side of the flip chips 14 adjacent to the solder balls 16, up through the chip, through the thermal gap pad 18, and to (and through) the cooling manifold 20. The largest constituent of that thermally conductive path is the thermal gap pad 18, with a thermal conductivity only on the order of 1-3 Watts/meter/degree-K. This thermal performance can be very limiting in some applications and limits the thermal performance of any module in which the flip chips 14 are a part, as well as the amount of power that could be used with such a module.
In the prior art configuration of FIG. 1, the gap-pad 18 needs to be compliant in compression and shear to compensate for coplanarity tolerances from chip-to-chip and in-plane movement, due to coefficient of thermal expansion (CTE) mismatch between the flip-chip 14, circuit board 12 and heat sink/cooling manifold 20 as well as vibration between the circuit board 12 on which the flip-chip circuit 14 is mounted and the heat sink/cooling manifold 20. The gap-pad technique can result in a thermal path having poor bulk thermal conductivity. Furthermore, the gap-pad approach results in thermal junctions on each surface of the gap pad (i.e. one thermal junction between the gap-pad 18 and the chip 14 and one thermal junction between the gap-pad 14 and the heat sink/cooling manifold 12). Such thermal junctions would not exist if the heat sink were directly mounted to the flip-chip. Furthermore, the thermal resistance at these junctions is relatively high compared with the thermal resistance that would result if the heat sink were directly mounted to the flip-chip.
Another issue with use of the thermal gap pad 18 of the prior art assembly 10 of FIG. 1 is that there can be a significant compression/clamping force required to form the thermal gap pad 18 around the flip chips 14 so as to minimize and/or reduce air gaps. This high force can result in damage to the flip chips 14. If an implementation uses a thermal gap pad, for example (as is done in the prior art), the thermal conductive path to the cooling manifold can be poor and can greatly compromise the thermal performance of the module as well as the amount of power that could be used with it.
A further issue with the use of the thermal gap pad 18 is that the compression of the thermal gap pad 18 attempts to compensate for variations in spacing between the surface of a heat dissipating member and a heat generating device. Thus, different thicknesses at the thermal interface exist. That is, due to variations in flatness and thickness of a heat sink and circuit components, the gap-pad portion located at one circuit component (e.g. one chip) is typically compressed to a different thickness than the gap-pad portion located at another circuit component. This can be seen in FIG. 1, for example, where the thermal gap pad 18 is compressed more over the taller flip chip 14A and less over the shortest flip chips 14D. As a result of such variations in thicknesses, the junction temperature at the flip-chips 14A-14D varies from one location to another. Such variations in thickness can result in temperature gradients across the array of active circuits. When the active circuits 14 and gap pad 18 are used as part of a phased array antenna, the phased array antenna will have temperature gradients, and such temperature gradients adversely affect the performance of the phased array antenna. When a phased array antenna is used as part of a radar system (e.g. a phased array radar system), the radar system the antenna must be designed such that temperature gradients do not exceed three (3) degrees Celsius (C.). Designing an antenna of medium to high power density to meet this thermal gradient is a difficult problem to solve in a phased array radar.
Another way of cooling flip chips involves applying a thermally conductive epoxy to the flip chip and attaching a heat spreader (typically a layer of aluminum or copper) to the thermally conductive epoxy, where the heat spreader is then coupled to a cooling manifold or a liquid cooled cold plate. However for packages that contain multiple flip chips of different thicknesses, and/or which can include radio frequency (RF) RF MMICs that require consistent temperatures be achieved from device to device, the mechanical tolerances of these devices (the RF MMICs) result in thermal gaps that are problematic for a thermally conductive epoxy to meet cooling requirements. In addition, these multi-channel flip chip based devices can have an electrical interface on the opposite side of their heat sink side (i.e., the top side of the flip chip). Consequently, the thickness of each printed wiring board (PWB) to which the flip chip is attached, and the relatively large tolerances associated with the PWB can present an additional thermal management problem, and can result in a total tolerance stackup of about +/−0.013″ (inches), which would require an unacceptably thick epoxy based thermal interface.
Still another proposed way to provide cooling for flip chips is through a highly thermally conductive phase change compound such as solder, wherein a thermal spreader/coldplate is directly soldered to the back (i.e., top surface) of the flip-chip, then the two are clamped together to achieve a good thermal joint. However this method has limitations should the ‘backside’ one or more flip chips be at electrical potential. In this instance application of this method would result in an electrical short circuit.